On Tue, Nov 03, 2020 at 06:49:23PM +0000, Daniele Alessandrelli wrote:
> From: Declan Murphy <[email protected]>
>
> Add device-tree bindings for the Intel Keem Bay Offload Crypto Subsystem
> (OCS) Hashing Control Unit (HCU) crypto driver.
>
> Signed-off-by: Declan Murphy <[email protected]>
> Signed-off-by: Daniele Alessandrelli <[email protected]>
> Acked-by: Mark Gross <[email protected]>
> ---
> .../crypto/intel,keembay-ocs-hcu.yaml | 51 +++++++++++++++++++
> 1 file changed, 51 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
>
> diff --git
> a/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
> b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
> new file mode 100644
> index 000000000000..cc03e2b66d5a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/crypto/intel,keembay-ocs-hcu.yaml
> @@ -0,0 +1,51 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/crypto/intel,keembay-ocs-hcu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel Keem Bay OCS HCU Device Tree Bindings
> +
> +maintainers:
> + - Declan Murphy <[email protected]>
> + - Daniele Alessandrelli <[email protected]>
> +
> +description:
> + The Intel Keem Bay Offload and Crypto Subsystem (OCS) Hash Control Unit
> (HCU)
> + provides hardware-accelerated hashing and HMAC.
> +
> +properties:
> + compatible:
> + const: intel,keembay-ocs-hcu
> +
> + reg:
> + items:
> + - description: The OCS HCU base register address
Just need 'maxItems: 1' if there's only 1. The description doesn't add
anything.
> +
> + interrupts:
> + items:
> + - description: OCS HCU interrupt
Same here
> +
> + clocks:
> + items:
> + - description: OCS clock
And here.
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + crypto@3000b000 {
> + compatible = "intel,keembay-ocs-hcu";
> + reg = <0x3000b000 0x1000>;
> + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&scmi_clk 94>;
> + };
> +
> +...
> --
> 2.26.2
>
