On 07/04/16 18:31, Marc Zyngier wrote:
+ All system register encodings above use the form
+
+ Op0, Op1, CRn, CRm, Op2.
+
+ Note that some of the encodings listed above include
+ the system register space reserved for the following
+ identification registers which may appear in future revisions
+ of the ARM architecture beyond ARMv8.0.
+ This space includes:
+ ID_AA64PFR[2-7]_EL1
+ ID_AA64DFR[2-3]_EL1
+ ID_AA64AFR[2-3]_EL1
+ ID_AA64ISAR[2-7]_EL1
+ ID_AA64MMFR[2-7]_EL1
AFAIK, the id space is unassigned. So the naming above could cause confusion
if the register is named something else.
+
+ check_local_cpu_errata();
+
What is the impact of moving this around? Suzuki, was there any
particular reason why this check was done later rather than earlier?
All the existing errata look for MIDR to match, which is read separately
using read_cpuid_id(). The moment we need to do something w.r.t an ID register,
this will break. So at the moment moving this doesn't have much of an impact.
Thanks
Suzuki
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