Hi Nicolin,
On 5/2/2025 4:31 AM, Nicolin Chen wrote: > Introduce a new IOMMUFD_CMD_VQUEUE_ALLOC ioctl for user space to allocate > a vQUEUE object for a vIOMMU specific HW-accelerated virtual queue, e.g.: > - NVIDIA's Virtual Command Queue > - AMD vIOMMU's Command Buffer, Event Log Buffer, and PPR Log Buffer > > This is a vIOMMU based ioctl. Simply increase the refcount of the vIOMMU. > > Reviewed-by: Pranjal Shrivastava <pr...@google.com> > Signed-off-by: Nicolin Chen <nicol...@nvidia.com> > --- > drivers/iommu/iommufd/iommufd_private.h | 2 + > include/uapi/linux/iommufd.h | 44 +++++++++++ > drivers/iommu/iommufd/main.c | 6 ++ > drivers/iommu/iommufd/viommu.c | 99 +++++++++++++++++++++++++ > 4 files changed, 151 insertions(+) > .../... > + > +/** > + * struct iommu_vqueue_alloc - ioctl(IOMMU_VQUEUE_ALLOC) > + * @size: sizeof(struct iommu_vqueue_alloc) > + * @flags: Must be 0 > + * @viommu_id: Virtual IOMMU ID to associate the virtual queue with > + * @type: One of enum iommu_vqueue_type > + * @index: The logical index to the virtual queue per virtual IOMMU, for a > multi > + * queue model > + * @out_vqueue_id: The ID of the new virtual queue > + * @addr: Base address of the queue memory in the guest physical address > space > + * @length: Length of the queue memory in the guest physical address space > + * > + * Allocate a virtual queue object for a vIOMMU-specific HW-acceleration > feature > + * that allows HW to access a guest queue memory described by @addr and > @length. > + * It's suggested for VMM to back the queue memory using a single huge page > with > + * a proper alignment for its contiguity in the host physical address space. > The > + * call will fail, if the queue memory is not contiguous in the physical > address > + * space. Upon success, its underlying physical pages will be pinned to > prevent > + * VMM from unmapping them in the IOAS, until the virtual queue gets > destroyed. > + * > + * A vIOMMU can allocate multiple queues, but it must use a different @index > to > + * separate each allocation, e.g. VCMDQ0, VCMDQ1, ... This will handle multiple queues. But AMD vIOMMU needs to comunicate certain control bit setting which is not related to buffers like "Completion wait interrupt". How do we handle that? extend iommu_queue_alloc() or have different interface? -Vasant
