On Mon, Aug 25, 2025 at 11:26:13PM +0800, Pincheng Wang wrote:
> On 2025/8/23 0:33, Conor Dooley wrote:
> > On Thu, Aug 21, 2025 at 10:01:27PM +0800, Pincheng Wang wrote:
> > > Add descriptions for the Zilsd (Load/Store pair instructions) and
> > > Zclsd (Compressed Load/Store pair instructions) ISA extensions
> > > which were ratified in commit f88abf1 ("Integrating load/store
> > > pair for RV32 with the main manual") of the riscv-isa-manual.
> > >
> > > Signed-off-by: Pincheng Wang <[email protected]>
> > > ---
> > > .../devicetree/bindings/riscv/extensions.yaml | 39 +++++++++++++++++++
> > > 1 file changed, 39 insertions(+)
> > >
> > > diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml
> > > b/Documentation/devicetree/bindings/riscv/extensions.yaml
> > > index ede6a58ccf53..d72ffe8f6fa7 100644
> > > --- a/Documentation/devicetree/bindings/riscv/extensions.yaml
> > > +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml
> > > @@ -366,6 +366,20 @@ properties:
> > > guarantee on LR/SC sequences, as ratified in commit
> > > b1d806605f87
> > > ("Updated to ratified state.") of the riscv profiles
> > > specification.
> > > + - const: zilsd
> > > + description:
> > > + The standard Zilsd extension which provides support for
> > > aligned
> > > + register-pair load and store operations in 32-bit instruction
> > > + encodings, as ratified in commit f88abf1 ("Integrating
> > > + load/store pair for RV32 with the main manual") of
> > > riscv-isa-manual.
> > > +
> > > + - const: zclsd
> > > + description:
> > > + The Zclsd extension implements the compressed (16-bit)
> > > version of the
> > > + Load/Store Pair for RV32. As with Zilsd, this extension was
> > > ratified
> > > + in commit f88abf1 ("Integrating load/store pair for RV32
> > > with the
> > > + main manual") of riscv-isa-manual.
> > > +
> > > - const: zk
> > > description:
> > > The standard Zk Standard Scalar cryptography extension as
> > > ratified
> > > @@ -847,6 +861,16 @@ properties:
> > > anyOf:
> > > - const: v
> > > - const: zve32x
> > > + # Zclsd depends on Zilsd and Zca
> > > + - if:
> > > + contains:
> > > + anyOf:
> > > + - const: zclsd
> > > + then:
> > > + contains:
> > > + anyOf:
> > > + - const: zilsd
> > > + - const: zca
> > > allOf:
> > > # Zcf extension does not exist on rv64
> > > @@ -864,6 +888,21 @@ allOf:
> > > not:
> > > contains:
> > > const: zcf
> > > + # Zilsd extension does not exist on rv64
> > > + - if:
> > > + properties:
> >
> > > + riscv,isa-extensions:
> > > + contains:
> > > + const: zilsd
> >
> > This syntax is odd, it shouldn't be required to have zilsd in here and
> > in the then. Did you copy this from Zcf or come up with it yourself
> > because it didn't work otherwise?
> >
>
> Yes, I did model this after the existing Zcf constraint in the same file.
> The structure is nearly identical: cheking for presence of the extension and
> rv64i, then forbidding it in the "then" branch.
>
> I've tested confirmed that removing the "contains: const: zilsd" from the
> "if" condition still correctly enforces that zilsd must not appear when
> rv64i is present. The "then" clause with "not: contains" is sufficient.
>
> Given that the validation behavior is equivalent, but the logic is cleaner
> and less redundant without the extra "contains", would you recommend
> updating it to the simpler form:
>
> - if:
> properties:
> riscv,isa-base:
> contains:
> const: rv64i
> then:
> properties:
> riscv,isa-extensions:
> not:
> contains:
> const: zilsd
>
> If so, I'll update it in the next revision.Yeah, please reduce it to this form.
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