I also found:
"This processor is in the inner shared domain, and uses its cache
coherency protocol."
I understand that some kind of memory coherency needs to be guaranteed
in AMP applications as well, if memory is used for communication between
the systems.
Of course with AMP can avoid using shared memory or restrict shared
memory usage to certain small areas necessary for communication. Perhaps
some kind of "cache bypass" method (that might be provided by the MPU
for DMA purpose) for the memory region used for communication can be
requested.
Thus, maybe setting SMPnAMP to "AMP" helps avoiding cache synchronizing
latency and by this greatly improves the calculated max latency and thus
especially in my favorite issue "virtual peripheral" is exactly the
missing feature that allows to avoid most of the "non-determinism"
problems Robert makes us aware of.
-Michael
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