In essence, if you are using the CPU to master reads/writes from/to the device, then the CPU host bridge will tend to do write combining, if appropriate, but you will not get any read bursts. This is due to limitations in virtually all host bridge chip sets having to do due with the complexity of maintaining cache coherency with the local memory. If you wish to burst write into the CPU memory, then your device must have bus mastering capabilities. The hardware manual for the device should instruct you how to set up multi-write cycles, so that you can burst data into the CPU memory. Note that you will almost never get an arbitrarily long burst, because the CPU bridge will disconnect you (usually on memory cache-line boundaries), and force a reconnect/retry to finish your data bursts. There are also maximum latency timers in the PCI devices, which are designed to force a master off the bus if another master is requesting access and the first one has used up all its alloted cycles. Note that a master is usually *not* forced off the bus at the end of the latency timer, if no one else is interested in using the bus. This is a common misconception. Check out the pci-sig web site, and sign up for the pci-sig mailing list. There are folks there that can help you with specific questions about PCI bus transactions, although you really should get a book on the subject, like the Shanley text on PCI System Architecture, before peppering the list with questions. Lastly, if you can find a Linux or BSD driver that is running hardware similar to what you have, then it would be a great help. I've only written PCI drivers for NT (cough, cough), so I wouldn't be much help in the Linux driver arena. Good luck, -- DaveN =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=- =-= Dave New, [EMAIL PROTECTED] | Machine vision? ESI Vision Products Division | At least *they* can see the future... 3980 Ranchero Drive | Ann Arbor, MI 48108 | Opinions expressed are mine. | PGP 2.6 (734) 332-7010 VOX | 08 12 9F AF 5B 3E B2 9B 6F DC 66 5A 41 0B AB 29 (734) 332-7077 FAX -----Original Message----- From: Jawad Qureshi [mailto:[EMAIL PROTECTED]] Sent: Thursday, January 04, 2001 8:25 AM To: [EMAIL PROTECTED] Subject: hi We are writing driver for Linux for some PCI device . We want to utilize the brust write and brust read capability that PCI interface provides us. How to do it? Any suggestions ? Jawad ____________________________________________________________________ Get free email and a permanent address at http://www.netaddress.com/?N=1 -- To unsubscribe from this list, send a message to [EMAIL PROTECTED] with the command "unsubscribe linux-embedded" in the message body. For more information, see <http://waste.org/mail/linux-embedded>. -- To unsubscribe from this list, send a message to [EMAIL PROTECTED] with the command "unsubscribe linux-embedded" in the message body. For more information, see <http://waste.org/mail/linux-embedded>.
