Hi, This series adds pinctrl/GPIO support for Intel Broxton SoC. The GPIO hardware is based on the same design already found in Intel Skylake (Sunrisepoint PCH).
This series adds a new driver pinctrl-broxton.c which reuses the existing Intel pinctrl core functionality and provides Broxton specific pin configuration. Mika Westerberg (3): pinctrl: intel: Add support for multiple GPIO chips sharing the interrupt pinctrl: intel: Allow requesting pins which are in ACPI mode as GPIOs pinctrl: intel: Add Intel Broxton pin controller support drivers/pinctrl/intel/Kconfig | 8 + drivers/pinctrl/intel/Makefile | 1 + drivers/pinctrl/intel/pinctrl-broxton.c | 1065 +++++++++++++++++++++++++++++++ drivers/pinctrl/intel/pinctrl-intel.c | 68 +- 4 files changed, 1123 insertions(+), 19 deletions(-) create mode 100644 drivers/pinctrl/intel/pinctrl-broxton.c -- 2.6.1 -- To unsubscribe from this list: send the line "unsubscribe linux-gpio" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
