Hi Dang,

kernel test robot noticed the following build errors:

[auto build test ERROR on ae2d20002576d2893ecaff25db3d7ef9190ac0b6]

url:    
https://github.com/intel-lab-lkp/linux/commits/Dang-Huynh-via-B4-Relay/dt-bindings-gpio-rda-Make-interrupts-optional/20250919-025331
base:   ae2d20002576d2893ecaff25db3d7ef9190ac0b6
patch link:    
https://lore.kernel.org/r/20250919-rda8810pl-mmc-v1-8-d4f08a05ba4d%40mainlining.org
patch subject: [PATCH 08/10] dmaengine: Add RDA IFC driver
config: m68k-allmodconfig 
(https://download.01.org/0day-ci/archive/20250921/[email protected]/config)
compiler: m68k-linux-gcc (GCC) 15.1.0
reproduce (this is a W=1 build): 
(https://download.01.org/0day-ci/archive/20250921/[email protected]/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <[email protected]>
| Closes: 
https://lore.kernel.org/oe-kbuild-all/[email protected]/

All errors (new ones prefixed by >>):

   drivers/dma/rda-ifc.c: In function 'rda_ifc_prep_slave_sg':
>> drivers/dma/rda-ifc.c:180:28: error: implicit declaration of function 
>> 'FIELD_PREP' [-Wimplicit-function-declaration]
     180 |                 control |= FIELD_PREP(IFC_CTL_SIZE, 0);
         |                            ^~~~~~~~~~


vim +/FIELD_PREP +180 drivers/dma/rda-ifc.c

   145  
   146  static struct dma_async_tx_descriptor *rda_ifc_prep_slave_sg(struct 
dma_chan *chan,
   147                  struct scatterlist *sgl, unsigned int sg_len,
   148                  enum dma_transfer_direction direction, unsigned long 
dma_flags,
   149                  void *context)
   150  {
   151          struct rda_ifc_chan *ifc_chan = to_ifc_chan(chan);
   152          struct rda_ifc *ifc = ifc_chan->rda_ifc;
   153          struct device *dev = dmaengine_get_dma_device(chan);
   154          struct scatterlist *sg;
   155          unsigned long flags;
   156          u32 control = 0;
   157          int width;
   158          int i;
   159  
   160          if (sg_len > ifc->sg_max) {
   161                  dev_err(dev, "sg_len %d overflowed (max sg %d)\n",
   162                                  sg_len, ifc->sg_max);
   163                  return NULL;
   164          }
   165  
   166          if (direction != ifc_chan->direction) {
   167                  dev_err(dev, "Inconsistent transfer direction\n");
   168                  return NULL;
   169          }
   170  
   171          spin_lock_irqsave(&ifc_chan->lock, flags);
   172  
   173          if (ifc_chan->direction == DMA_DEV_TO_MEM)
   174                  width = ifc_chan->sconfig.src_addr_width;
   175          else
   176                  width = ifc_chan->sconfig.dst_addr_width;
   177  
   178          switch (width) {
   179          case DMA_SLAVE_BUSWIDTH_1_BYTE:
 > 180                  control |= FIELD_PREP(IFC_CTL_SIZE, 0);
   181                  break;
   182          case DMA_SLAVE_BUSWIDTH_2_BYTES:
   183                  control |= FIELD_PREP(IFC_CTL_SIZE, 1);
   184                  break;
   185          case DMA_SLAVE_BUSWIDTH_4_BYTES:
   186                  control |= FIELD_PREP(IFC_CTL_SIZE, 2);
   187                  break;
   188          default:
   189                  return NULL;
   190          }
   191  
   192          for_each_sg(sgl, sg, sg_len, i) {
   193                  if (!IS_ALIGNED(sg_dma_address(sg), width)) {
   194                          dev_err(dev, "Unaligned DMA address\n");
   195                          spin_unlock_irqrestore(&ifc_chan->lock, flags);
   196                          return NULL;
   197                  }
   198  
   199                  writel(sg_dma_address(sg), ifc_chan->chan_base + 
IFC_REG_SG_START_ADDR + (8 * i));
   200                  writel(sg_dma_len(sg), ifc_chan->chan_base + 
IFC_REG_SG_TC + (8 * i));
   201          }
   202  
   203          control |= FIELD_PREP(IFC_CTL_REQ_SRC, ifc_chan->request_id) |
   204                  IFC_CTL_CH_RD_HW_EXCH |
   205                  FIELD_PREP(IFC_CTL_SG_NUM, sg_len-1);
   206          writel(control, ifc_chan->chan_base);
   207  
   208          spin_unlock_irqrestore(&ifc_chan->lock, flags);
   209  
   210          dma_async_tx_descriptor_init(&ifc_chan->tx, chan);
   211          ifc_chan->tx.tx_submit = rda_ifc_tx_submit;
   212  
   213          return &ifc_chan->tx;
   214  }
   215  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

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