On Wed, Jan 07, 2026 at 05:17:09PM +0530, Manivannan Sadhasivam wrote: > On Wed, Nov 26, 2025 at 06:27:13PM +0200, Dmitry Baryshkov wrote: > > On Wed, Nov 12, 2025 at 02:55:29PM +0100, Bartosz Golaszewski wrote: > > > Bjorn, Konrad: I should have Cc'ed you on v1 but I just went with what > > > came out of b4 --auto-to-cc. It only gave me arm-msm. :( Patch 7 from > > > this series however impacts Qualcomm platforms. It's a runtime dependency > > > of patches 8 and 9. Would you mind Acking it so that I can take it into > > > an immutable branch that I'll make available to Mark Brown for him to > > > take patches 8-10 through the ASoC and regulator trees for v6.19? > > > > > > Problem statement: GPIOs are implemented as a strictly exclusive > > > resource in the kernel but there are lots of platforms on which single > > > pin is shared by multiple devices which don't communicate so need some > > > way of properly sharing access to a GPIO. What we have now is the > > > GPIOD_FLAGS_BIT_NONEXCLUSIVE flag which was introduced as a hack and > > > doesn't do any locking or arbitration of access - it literally just hand > > > the same GPIO descriptor to all interested users. > > > > > > The proposed solution is composed of three major parts: the high-level, > > > shared GPIO proxy driver that arbitrates access to the shared pin and > > > exposes a regular GPIO chip interface to consumers, a low-level shared > > > GPIOLIB module that scans firmware nodes and creates auxiliary devices > > > that attach to the proxy driver and finally a set of core GPIOLIB > > > changes that plug the former into the GPIO lookup path. > > > > > > The changes are implemented in a way that allows to seamlessly compile > > > out any code related to sharing GPIOs for systems that don't need it. > > > > > > The practical use-case for this are the powerdown GPIOs shared by > > > speakers on Qualcomm db845c platform, however I have also extensively > > > tested it using gpio-virtuser on arm64 qemu with various DT > > > configurations. > > > > > > I'm Cc'ing some people that may help with reviewing/be interested in > > > this: OF maintainers (because the main target are OF systems initially), > > > Mark Brown because most users of GPIOD_FLAGS_BIT_NONEXCLUSIVE live > > > in audio or regulator drivers and one of the goals of this series is > > > dropping the hand-crafted GPIO enable counting via struct > > > regulator_enable_gpio in regulator core), Andy and Mika because I'd like > > > to also cover ACPI (even though I don't know about any ACPI platform that > > > would need this at the moment, I think it makes sense to make the > > > solution complete), Dmitry (same thing but for software nodes), Mani > > > (because you have a somewhat related use-case for the PERST# signal and > > > I'd like to hear your input on whether this is something you can use or > > > maybe it needs a separate, implicit gpio-perst driver similar to what > > > Krzysztof did for reset-gpios) and Greg (because I mentioned this to you > > > last week in person and I also use the auxiliary bus for the proxy > > > devices). > > > > Hi, > > > > I'm sorry if this was already reported and fixed. On Qualcomm RB5 > > platform with this patchset in place I'm getting the following backtrace > > (and then a lockup): > > > > On Rb3Gen2 this breaks UFS: > > ufshcd-qcom 1d84000.ufshc: cannot find GPIO chip > gpiolib_shared.proxy.4, deferring
CONFIG_GPIO_SHARED_PROXY=y ? > > But MMC acquired the GPIO successfully, > > sdhci_msm 8804000.mmc: Got CD GPIO > > But I can see gpiochips registered as well: > > (initramfs) ls /dev/gpio* > crw------- 1 0 0 254,0 /dev/gpiochip0 > crw------- 1 0 0 254,1 /dev/gpiochip1 > crw------- 1 0 0 254,2 /dev/gpiochip2 > crw------- 1 0 0 254,3 /dev/gpiochip3 > crw------- 1 0 0 254,4 /dev/gpiochip4 > > Let me know if you need more info. > > - Mani > > -- > மணிவண்ணன் சதாசிவம் -- With best wishes Dmitry
