On Fri, Feb 06, 2026 at 09:02:32AM +0000, Xianwei Zhao wrote:
> Add documentation describing the Amlogic A9 SoC DMA.
>
> Signed-off-by: Xianwei Zhao <[email protected]>
> ---
> .../devicetree/bindings/dma/amlogic,a9-dma.yaml | 66
> ++++++++++++++++++++++
> 1 file changed, 66 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/dma/amlogic,a9-dma.yaml
> b/Documentation/devicetree/bindings/dma/amlogic,a9-dma.yaml
> new file mode 100644
> index 000000000000..3158d99a3195
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/dma/amlogic,a9-dma.yaml
> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/dma/amlogic,a9-dma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Amlogic general DMA controller
> +
> +description:
> + This is a general-purpose peripheral DMA controller. It currently supports
> + major peripherals including I2C, I3C, PIO, and CAN-BUS. Transmit and
> receive
> + for the same peripheral use two separate channels, controlled by different
> + register sets. I2C and I3C transfer data in 1-byte units, while PIO and
> + CAN-BUS transfer data in 4-byte units. From the controller’s perspective,
> + there is no significant difference.
> +
> +maintainers:
> + - Xianwei Zhao <[email protected]>
> +
> +properties:
> + compatible:
> + const: amlogic,a9-dma
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: sys
> +
> + '#dma-cells':
> + const: 2
> +
> + dma-channels:
> + $ref: /schemas/types.yaml#/definitions/uint32
Needn't it, which is standard proptery.
Frank
> + maximum: 64
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - clocks
> + - '#dma-cells'
> + - dma-channels
> +
> +allOf:
> + - $ref: dma-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + dma-controller@fe400000{
> + compatible = "amlogic,a9-dma";
> + reg = <0xfe400000 0x4000>;
> + interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
> + clocks = <&clkc 45>;
> + #dma-cells = <2>;
> + dma-channels = <28>;
> + };
>
> --
> 2.52.0
>
