On Thu, Sep 05, 2019 at 01:45:54AM +0000, Dan Robertson wrote: > Fix an error in the bitmaskfor the shtc1 and shtw1 bitmask used to > retrieve the chip ID from the ID register. See section 5.7 of the shtw1 > or shtc1 datasheet for details. > > Fixes: 1a539d372edd9832444e7a3daa710c444c014dc9 ("hwmon: add support for > Sensirion SHTC1 sensor") > Signed-off-by: Dan Robertson <d...@dlrobertson.com>
Applied after reordering and adjusting. The fix should come first, followed by adding support for the new chip. Thanks, Guenter > --- > drivers/hwmon/shtc1.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/hwmon/shtc1.c b/drivers/hwmon/shtc1.c > index 3e9a859a2b58..c628313a20d4 100644 > --- a/drivers/hwmon/shtc1.c > +++ b/drivers/hwmon/shtc1.c > @@ -27,14 +27,14 @@ static const unsigned char > shtc1_cmd_measure_nonblocking_lpm[] = { 0x60, 0x9c }; > static const unsigned char shtc1_cmd_read_id_reg[] = { 0xef, > 0xc8 }; > > /* constants for reading the ID register > - * SHTC1: 0x0007 with mask 0x001f > - * SHTW1: 0x0007 with mask 0x001f > + * SHTC1: 0x0007 with mask 0x003f > + * SHTW1: 0x0007 with mask 0x003f > * SHTC3: 0x0807 with mask 0x083f > */ > #define SHTC3_ID 0x0807 > #define SHTC3_ID_MASK 0x083f > #define SHTC1_ID 0x0007 > -#define SHTC1_ID_MASK 0x001f > +#define SHTC1_ID_MASK 0x003f > > /* delays for non-blocking i2c commands, both in us */ > #define SHTC1_NONBLOCKING_WAIT_TIME_HPM 14400