Hello.
David Daney wrote:
Signed-off-by: David Daney <[email protected]>
CC: Rade Bozic <[email protected]>
[...]
diff --git a/arch/mips/cavium-octeon/octeon-platform.c
b/arch/mips/cavium-octeon/octeon-platform.c
index 20698a6..f2c0602 100644
--- a/arch/mips/cavium-octeon/octeon-platform.c
+++ b/arch/mips/cavium-octeon/octeon-platform.c
@@ -165,6 +165,78 @@ out:
}
device_initcall(octeon_rng_device_init);
+
+#define OCTEON_I2C_IO_BASE 0x1180000001000ull
+#define OCTEON_I2C_IO_UNIT_OFFSET 0x200
+
+static struct octeon_i2c_data octeon_i2c_data[2];
+
+static int __init octeon_i2c_device_init(void)
+{
+ struct platform_device *pd;
+ int ret = 0;
+ int port, num_ports;
+
+ struct resource i2c_resources[] = {
+ {
+ .flags = IORESOURCE_MEM,
+ }, {
+ .flags = IORESOURCE_IRQ,
+ }
+ };
+
+ if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN52XX))
+ num_ports = 2;
+ else
+ num_ports = 1;
+
+ for (port = 0; port < num_ports; port++) {
+ octeon_i2c_data[port].sys_freq = octeon_get_clock_rate();
+ /*FIXME: should be examined. At the moment is set for 100Khz */
+ octeon_i2c_data[port].i2c_freq = 100000;
+
+ pd = platform_device_alloc("i2c-octeon", port);
+ if (!pd) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ pd->dev.platform_data = octeon_i2c_data + port;
+
+ i2c_resources[0].start =
+ OCTEON_I2C_IO_BASE + (port * OCTEON_I2C_IO_UNIT_OFFSET);
+ i2c_resources[0].end = i2c_resources[0].start + 0x20;
Not 0x1F?
WBR, Sergei
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