> -----Original Message----- > From: Li Yang-Leo-R58472 > Sent: 2015年9月23日 1:23 > To: Hou Zhiqiang-B48286; Mark Rutland; marc.zyng...@arm.com > Cc: linux-arm-ker...@lists.infradead.org; Catalin Marinas; Will Deacon; > linux-i2c@vger.kernel.org; linux-watch...@vger.kernel.org; linux- > d...@vger.kernel.org; linux-...@vger.kernel.org; Xie Shaohui-B21989; > cor...@lwn.net; Sharma Bhupesh-B45370; mturque...@baylibre.com; wsa@the- > dreams.de; sb...@codeaurora.org; w...@iguana.be; Song Wenbin-B53747; Wood > Scott-B07421; Hu Mingkai-B21284 > Subject: RE: [PATCH 4/6] arm64/ls1043a: add DTS for Freescale LS1043A SoC > > > > > > > Hi, > > > > > > > +/memreserve/ 0x80000000 0x00010000; > > > > > > Why is this necessary? > > > > This memory region is pre-reserved for the spin-table/psci, although > > didn't add Enable method of secondary cores. > > Can this be reserved by bootloader?
Yes, the memory for psci was reserved by u-boot code. But due to spin-table need the release address, is it better adding the /memreserve/ in dts file? Or add it by bootloader and fix the release address accordingly? > > > > > > If this is necessary, please add a comment stating what this is for. > > > > > > > + cpu@3 { > > > > + device_type = "cpu"; > > > > + compatible = "arm,cortex-a53"; > > > > + reg = <0x0 0x3>; > > > > + clocks = <&clockgen 1 0>; > > > > + }; > > > > > > Missing enable-method properties on all the secondary CPUs. > > > > > > > There are two methods (spin-table and psci) to bring up secondary > > cores, which one do you think is better? > > Do we have the PSCI support ready in both UEFI and u-boot? If not, we > should use spin-table for now. > our internal u-boot supports PSCI but opensource doesn't support it for ARMv8. Thanks, Zhiqiang N�Р骒r��y����b�X�肚�v�^�)藓{.n�+�伐�{��g"��^n�r■�z���h�ㄨ��&Ⅷ�G���h�(�����茛j"���m����赇z罐��帼f"�h���~�m�