On Sun, Sep 27, 2015 at 06:05:35PM +0200, Olliver Schinagl wrote: > Hey Hans, > > On 27-09-15 16:57, Hans de Goede wrote: > >According to the datasheets to n factor for dividing the tclk is > >2 to the power n on Allwinner SoCs, not 2 to the power n + 1 as it is > >on other mv64xxx implementations. > Ah! > > > >I've contacted Allwinner about this and they have confirmed that the > >datasheet is correct. > > > >This commit fixes the clk-divider calculations for Allwinner SoCs > >accordingly. > So this explains why all my i2c frequenties are double of what I setup. > Thanks for taking the time of figuring it out! I'll give it a test hopefully > soon.
It would have been great to let us know... Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
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