This patch set default values for the FIFO PCI Bus Arbitration to avoid data corruption. The root cause is due to our PCI bus master handling mismatch with the chipset PCI bridge during DMA xfer (write data to the device). The patch is to setup the DMA fifo threshold so that there is no chance for the DMA engine to change protocol. We have seen this problem only on one motherboard.
Signed-off-by: Silicon Image Corporation <[EMAIL PROTECTED]>
patch-a-sata_sil-FIFO-26114
Description: patch-a-sata_sil-FIFO-26114
