> (correctly probably). Question is, where is the irq coming from then.
> 
> Obviously this is a horribly wrong fix, since if the interrupt is shared, we 
> will shadow the other interrupt so it never gets run (and corrupt our own 
> BM DMA operations).

I wonder if it's left over from the resume I/O completing or the chip
coming back up in a stupid state. What occurs if the bit is cleared
during the early resume before IRQs are turned back on ?
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