On Wednesday 14 February 2007 23:35, Sergei Shtylyov wrote: > The IDE core looks at the wrong bit when checking if the secondary channel is > enabled on PCI0646 -- CFR bit 8 is read-ahead disable, bit 3 is the correct > one.
I guess that you meant CNTRL here? [ I corrected this in the applied patch ] > Starting with PCI0646U chip, the primary channel can also be enbled/disabled > -- > so, add 'enablebits' initializers to each 'ide_pci_device_t' structure, > handling > the original PCI0646 via adding the init_setup() method and clearing the 'reg' > field there if necessary... > > Signed-off-by: Sergei Shtylyov <[EMAIL PROTECTED]> applied - To unsubscribe from this list: send the line "unsubscribe linux-ide" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
