On Saturday 14 April 2007, Sergei Shtylyov wrote: > The IDE core looks at the wrong bit when checking if the secondary channel is > enabled on PCI0646 -- CNTRL register bit 7 is read-ahead disable, bit 3 is the > correct one. > Starting with PCI0646U chip, the primary channel can also be enabled/disabled > -- > so, add 'enablebits' initializers to each 'ide_pci_device_t' structure, > handling > the original PCI0646 via adding the init_setup() method and clearing the 'reg' > field there if necessary... > > Signed-off-by: Sergei Shtylyov <[EMAIL PROTECTED]> > Signed-off-by: Bartlomiej Zolnierkiewicz <[EMAIL PROTECTED]> > > --- > This is an update due to patch order changes. Has also been tested on > PCI-649.
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