On Thu 23 Jul 2009 02:09, gyang pondered: > > >> > > >> Don't you want the Level3 SEQSTAT on the frame? otherwise - it will > > >> print out the wrong seqstat when the traps_c code is run. > > > > > > I now find that the SEQSTAT is not a problem. > > > > so you'll revert this change ? > I'm trying another method. > Can we load the cplb entry that covered the SP, before lowering to EVT5?
No. The exception stack (while running in EVT3) isn't accessable by anything else (like whatever is running at EVT5). > It's a little ugly, because the frame by SAVE_ALL_SYS may across pages. > It means we may need setting 2 entries together, which is not the > thought of MPU. but SAVE_ALL_SYS crossing pages isn't a problem in the normal case (a miss happens, and the CPLB is installed) - that is the way it is suppost to happen... It's only a problem when we are trying to debug a double fault... > > > But cpu_pda[].dcplb_fault_addr will be wrong in trap_c. > > > > why ? because after lowering to EVT5 we took a miss and that then > > clobbered the fault addr that was stored before lowering ? > > -mike > Yes. > Is there any other concern about this patch? It's completely not necessary for correctness when CONFIG_DOUBLE_FAULT is off... _______________________________________________ Linux-kernel-commits mailing list [email protected] https://blackfin.uclinux.org/mailman/listinfo/linux-kernel-commits
