On Sat, Sep 09, 2000 at 12:50:38AM +1100, Anton Blanchard wrote:
> Yeah on most architectures you cant do an xchg of a 16 bit quantity.
> Rusty has a patch:
>
...
FWIW, here are __xchg_u8 and __xchg_u16 for Alpha.
Ivan.
--- 2.4.0t8p6/include/asm-alpha/system.h Thu Sep 7 19:01:46 2000
+++ linux/include/asm-alpha/system.h Fri Sep 8 20:12:47 2000
@@ -347,6 +347,56 @@ extern void __global_restore_flags(unsig
*/
extern __inline__ unsigned long
+__xchg_u8(volatile char *m, unsigned long val)
+{
+ unsigned long tmp1, tmp2, addr64;
+
+ __asm__ __volatile__(
+ " andnot %4,7,%3\n"
+ " insbl %0,%4,%1\n"
+ "1: ldq_l %2,0(%3)\n"
+ " extbl %2,%4,%0\n"
+ " mskbl %2,%4,%2\n"
+ " or %1,%2,%2\n"
+ " stq_c %2,0(%3)\n"
+ " beq %2,2f\n"
+ " mb\n"
+ ".subsection 2\n"
+ "2: br 1b\n"
+ ".previous"
+ : "=&r" (val), "=r" (tmp1), "=r" (tmp2), "=r" (addr64)
+ : "r" ((long)m), "0" (val)
+ : "memory");
+
+ return val;
+}
+
+extern __inline__ unsigned long
+__xchg_u16(volatile short *m, unsigned long val)
+{
+ unsigned long tmp1, tmp2, addr64;
+
+ __asm__ __volatile__(
+ " andnot %4,7,%3\n"
+ " inswl %0,%4,%1\n"
+ "1: ldq_l %2,0(%3)\n"
+ " extwl %2,%4,%0\n"
+ " mskwl %2,%4,%2\n"
+ " or %1,%2,%2\n"
+ " stq_c %2,0(%3)\n"
+ " beq %2,2f\n"
+ " mb\n"
+ ".subsection 2\n"
+ "2: br 1b\n"
+ ".previous"
+ : "=&r" (val), "=r" (tmp1), "=r" (tmp2), "=r" (addr64)
+ : "r" ((long)m), "0" (val)
+ : "memory");
+
+ return val;
+}
+
+extern __inline__ unsigned long
__xchg_u32(volatile int *m, unsigned long val)
{
unsigned long dummy;
@@ -394,6 +444,10 @@ static __inline__ unsigned long
__xchg(volatile void *ptr, unsigned long x, int size)
{
switch (size) {
+ case 1:
+ return __xchg_u8(ptr, x);
+ case 2:
+ return __xchg_u16(ptr, x);
case 4:
return __xchg_u32(ptr, x);
case 8:
-
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