You can not use R4K CP0_count in SMP (multicore) without core-specific
adjustment.
After first power-saving with core clock off or core down the values in
CP0_count
in different cores are absolutely different.
Until you include in system a patch like
http://patchwork.linux-mips.org/patch/10871/
"MIPS: Setup an instruction emulation in VDSO protected page
instead of user stack"
which creates a per-thread memory and put into that memory an adjustment
value
(which can be changed during re-schedule to another core), the use of
R4K counter is incorrect
in SMP environment.
Note: It is also possible to setup and maintain a per-core page with
that value too as
an alternative variant for adjustment.
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