On Fri, Oct 23, 2015 at 08:31:20PM -0500, J. German Rivera wrote:
> Added sys-reboot node to the FSL's LS2085A SoC DT to leverage
> the ARM-generic reboot mechanism for this SoC. This mechanism
> is enabled through CONFIG_POWER_RESET_SYSCON.
Per the comments in arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi, the
platform has PSCI 0.2+, and therefore already has system reset
functionality.
Given that, why is this necessary?
Thanks,
Mark.
> Signed-off-by: J. German Rivera <german.riv...@freescale.com>
> ---
> arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
> b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
> index e281ceb..6f82163 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls2085a.dtsi
> @@ -131,6 +131,18 @@
> interrupts = <1 9 0x4>;
> };
>
> + rst_ccsr: rstccsr@1E60000 {
> + compatible = "syscon";
> + reg = <0x0 0x1E60000 0x0 0x10000>;
> + };
> +
> + reboot@65024000 {
> + compatible ="syscon-reboot";
> + regmap = <&rst_ccsr>;
> + offset = <0x0>;
> + mask = <0x2>;
> + };
> +
> timer {
> compatible = "arm,armv8-timer";
> interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */
> --
> 2.3.3
>
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