3.19.8-ckt10 -stable review patch. If anyone has any objections, please let me know.
------------------ From: =?UTF-8?q?Ville=20Syrj=C3=A4l=C3=A4?= <ville.syrj...@linux.intel.com> commit 8e7a65aa70bcc1235a44e40ae0da5056525fe081 upstream. We accidentally lost the initial DPLL register write in 1c4e02746147 drm/i915: Fix DVO 2x clock enable on 830M The "three times for luck" hack probably saved us from a total disaster. But anyway, bring the initial write back so that the code actually makes some sense. Reported-and-tested-by: Nick Bowler <nbow...@draconx.ca> References: http://mid.gmane.org/can_qmvymaarxygecvvsgvsmo7-6ohzr8hmf5vhkkl4i9kom...@mail.gmail.com Cc: Nick Bowler <nbow...@draconx.ca> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch> Signed-off-by: Jani Nikula <jani.nik...@intel.com> Signed-off-by: Kamal Mostafa <ka...@canonical.com> --- drivers/gpu/drm/i915/intel_display.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ada0210..a67dde0 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1623,6 +1623,8 @@ static void i9xx_enable_pll(struct intel_crtc *crtc) I915_READ(DPLL(!crtc->pipe)) | DPLL_DVO_2X_MODE); } + I915_WRITE(reg, dpll); + /* Wait for the clocks to stabilize. */ POSTING_READ(reg); udelay(150); -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
