On Thu, Dec 07, 2006 at 03:50:52PM +0100, Olivier Galibert wrote:
> The x86-64 mmconfig code always map a range of MMCONFIG_APER_MAX
> bytes, i.e. 256MB, whatever the number of accessible busses is. Fix
> it, and add the end of the zone in the printk while we're at it.
>
> Signed-off-by: Olivier Galibert <[EMAIL PROTECTED]>
> ---
> arch/x86_64/pci/mmconfig.c | 9 +++------
> 1 files changed, 3 insertions(+), 6 deletions(-)
>
> diff --git a/arch/x86_64/pci/mmconfig.c b/arch/x86_64/pci/mmconfig.c
> index b270f20..091f759 100644
> --- a/arch/x86_64/pci/mmconfig.c
> +++ b/arch/x86_64/pci/mmconfig.c
> @@ -13,10 +13,6 @@
>
> #include "pci.h"
>
> -/* aperture is up to 256MB but BIOS may reserve less */
> -#define MMCONFIG_APER_MIN (2 * 1024*1024)
> -#define MMCONFIG_APER_MAX (256 * 1024*1024)
> -
> /* Verify the first 16 busses. We assume that systems with more busses
> get MCFG right. */
> #define MAX_CHECK_BUS 16
> @@ -145,16 +141,17 @@ int __init pci_mmcfg_arch_init(void)
> }
>
> for (i = 0; i < pci_mmcfg_config_num; ++i) {
> + u32 size = (pci_mmcfg_config[0].end_bus_number -
> pci_mmcfg_config[0].start_bus_number + 1) << 20;
> pci_mmcfg_virt[i].cfg = &pci_mmcfg_config[i];
> pci_mmcfg_virt[i].virt =
> ioremap_nocache(pci_mmcfg_config[i].base_address,
> - MMCONFIG_APER_MAX);
> + size);
> if (!pci_mmcfg_virt[i].virt) {
> printk(KERN_ERR "PCI: Cannot map mmconfig aperture for "
> "segment %d\n",
> pci_mmcfg_config[i].pci_segment_group_number);
> return 0;
> }
> - printk(KERN_INFO "PCI: Using MMCONFIG at %x\n",
> pci_mmcfg_config[i].base_address);
> + printk(KERN_INFO "PCI: Using MMCONFIG at %x-%x\n",
> pci_mmcfg_config[i].base_address, pci_mmcfg_config[i].base_address + size -
> 1);
80 chars per line please...
Cheers,
Muli
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