From: Andi Kleen <a...@linux.intel.com>
The constraint added earlier in
"Use INST_RETIRED.TOTAL_CYCLES_PS for cycles:pp for Skylake"
had a typo. The event can of course be scheduled on all four counters.
So fix the mask.
This patch could be merged with the earlier patch.
Signed-off-by: Andi Kleen <a...@linux.intel.com>
---
arch/x86/kernel/cpu/perf_event_intel_ds.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c
b/arch/x86/kernel/cpu/perf_event_intel_ds.c
index 1259065..42d42af 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_ds.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c
@@ -725,7 +725,7 @@ struct event_constraint intel_skl_pebs_event_constraints[]
= {
/* INST_RETIRED.PREC_DIST, inv=1, cmask=16 (cycles:ppp). */
INTEL_FLAGS_EVENT_CONSTRAINT(0x108001c0, 0x2),
/* INST_RETIRED.TOTAL_CYCLES_PS (inv=1, cmask=16) (cycles:p). */
- INTEL_FLAGS_EVENT_CONSTRAINT(0x108000c0, 0x01),
+ INTEL_FLAGS_EVENT_CONSTRAINT(0x108000c0, 0xf),
INTEL_PLD_CONSTRAINT(0x1cd, 0xf), /*
MEM_TRANS_RETIRED.* */
INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_LD(0x11d0, 0xf), /*
MEM_INST_RETIRED.STLB_MISS_LOADS */
INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_ST(0x12d0, 0xf), /*
MEM_INST_RETIRED.STLB_MISS_STORES */
--
2.4.3
--
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