On 11/12/15 02:58, Rob Herring wrote:
> On Wed, Dec 09, 2015 at 10:29:35PM +0000, Simon Arlott wrote:
>> The BCM6358 contains power domains controlled with a register. Power
>> domains are indexed by bits in the register. Power domain bits can be
>> interleaved with other status bits and clocks in the same register.
>> 
>> Newer SoCs with dedicated power domain registers are active low.
>> 
>> Signed-off-by: Simon Arlott <si...@fire.lp0.eu>
>> ---
>>  .../power/brcm,bcm6358-power-controller.txt        | 53 
>> ++++++++++++++++++++++
>>  1 file changed, 53 insertions(+)
>>  create mode 100644 
>> Documentation/devicetree/bindings/power/brcm,bcm6358-power-controller.txt
>> 
>> diff --git 
>> a/Documentation/devicetree/bindings/power/brcm,bcm6358-power-controller.txt 
>> b/Documentation/devicetree/bindings/power/brcm,bcm6358-power-controller.txt
>> new file mode 100644
>> index 0000000..556c323
>> --- /dev/null
>> +++ 
>> b/Documentation/devicetree/bindings/power/brcm,bcm6358-power-controller.txt
>> @@ -0,0 +1,53 @@
>> +Broadcom BCM6358 Power domain controller
>> +
>> +This binding uses the power domain bindings:
>> +        Documentation/devicetree/bindings/power/power_domain.txt
>> +
>> +The BCM6358 contains power domains controlled with a register. Power
>> +domains are indexed by bits in the register. Power domain bits can be
>> +interleaved with other status bits and clocks in the same register.
>> +
>> +Newer SoCs with dedicated power domain registers are active low.
>> +
>> +Required properties:
>> +- compatible:           Should be "brcm,bcm<soc>-power-controller", 
>> "brcm,bcm6358-power-controller"
>> +- #power-domain-cells:  Should be <1>.
>> +- regmap:               The register map phandle
>> +- offset:               Offset in the register map for the power domain 
>> register (in bytes)
>> +- power-domain-indices: The bits in the register used for power domains.
> 
> You should drop this and make the cell values be the register offsets.

I need to register every power domain in order to get the kernel to turn
off those that are unused. Even if I could enumerate all device tree
devices that reference the power-controller node, not all of them have
bindings to allow them to be specified in the device tree file.

I can't register all 32 bits because that won't work on the BCM6358 that
only has 1 power domain bit in the register and several clock bits. On
the BCM63268 there are power domain bits that have no device that I
don't want the kernel to disable (like the memory controller).

How should I determine which bits to register a power domain for?

        misc_iddq_ctrl: power-controller@1000184c {
                compatible = "brcm,bcm6358-power-controller";
                regmap = <&misc>;
                offset = <0x4c>;

                mask = <0x1043fff>;

                #power-domain-cells = <1>;
        };

or

        misc_iddq_ctrl: power-controller@1000184c {
                compatible = "brcm,bcm6358-power-controller";
                regmap = <&misc>;
                offset = <0x4c>;

                #address-cells = <1>;
                #size-cells = <0>;

                sar: power-controller@0 {
                        reg = <0>;
                        #power-domain-cells = <0>;
                };

                ipsec: power-controller@1 {
                        reg = <1>;
                        #power-domain-cells = <0>;
                };

                ...
        };

or something else?

>> +- power-domain-names:   Should be a list of strings of power domain names
>> +                        indexed by the power domain indices.
> 
> This isn't really needed anyway.

If I remove this then I'll have to use the same node name for each
struct generic_pm_domain "name" field that I register, although these
names don't appear to be exported anywhere.

>> +
>> +Optional properties:
>> +- active-low:           Specify that the bits are active low.
> 
> This should be implied by the compatible property.

Ok, I'll create "brcm,bcm6358-power-controller" that's active high and
"brcm,bcm6328-power-controller" that's active low. This appear to be
the earliest chips that introduced or changed "iddq" register bits.

-- 
Simon Arlott
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