Signed-off-by: Rongrong Zou <zourongr...@gmail.com>
---
.../devicetree/bindings/arm64/low-pin-count.txt | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm64/low-pin-count.txt
diff --git a/Documentation/devicetree/bindings/arm64/low-pin-count.txt
b/Documentation/devicetree/bindings/arm64/low-pin-count.txt
new file mode 100644
index 0000000..215f2c4
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm64/low-pin-count.txt
@@ -0,0 +1,20 @@
+Low Pin Count bus driver
+
+Usually LPC controller is part of PCI host bridge, so the legacy ISA
+port locate on LPC bus can be accessed directly. But some SoC have
+independent LPC controller, and we can access the legacy port by specifying
+LPC address cycle. Thus, LPC driver is introduced.
+
+Required properties:
+- compatible: "low-pin-count"
+- reg: specifies low pin count address range
+
+
+Example:
+
+ lpc_0: lpc@a01b0000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "low-pin-count";
+ reg = <0x0 0xa01b0000 0x0 0x10000>;
+ };
--
1.9.1
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/
