On Tuesday 29 December 2015 22:03:14 Rongrong Zou wrote:
> 在 2015/12/29 21:51, Arnd Bergmann 写道:
> > On Tuesday 29 December 2015 21:33:51 Rongrong Zou wrote:
> >> We only implement io cycles here, we hook the lpc_io_write_byte
> >> and lpc_io_read_byte to inb/outb. So the drivers(ipmi/uart) which access
> >> the legacy ISA I/O port need no modification.
> >>
> >> The low pin count specification is at
> >> http://www.intel.com/design/chipsets/industry/lpc.htm
> >>
> >> Signed-off-by: Rongrong Zou <zourongr...@gmail.com>
> >
> > I'm slightly confused here: I thought this driver was hisilicon specific.
> > Is the MMIO register layout that is used in this hardware actually
> > standardized
> > in a way that the driver also works for all other implementations?
>
> The register defined is not standardized. other vendors may define their own
> registers.
Ok, please clarify this in the patch description, the Kconfig help text and
the DT binding then.
Arnd
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