On Sat, Jan 16, 2016 at 01:38:11AM +0100, Rafał Miłecki wrote: > So I wanted to stick to the cached mapping, [...]
I mentioned this earlier on, but I don't feel like I've gotten a clear answer. Is a cached mapping actually safe here? From the looks of it, the memory mapping is a read-only memory-mapped flash, and flash writes / erasures are done through a different bus (register writes vis BCMA bus). So if we have a cached mapping of that memory, it doens't naturally synchronize with any write/erase operations. Doesn't this mean you might get stale data if you do a sequence of read / erase / read, for instance, since the 2nd read will return cached data from the 1st read? IIUC, this could be solved by: (a) using an uncached mapping or (b) explicitly invalidating the relevant region after doing flash writes or erasures But I wonder why you haven't seen any problems if you've been using KSEG0 (cached) this whole time. Maybe just luck? Or you don't actually write to the flash that much? Brian
