Ingo Molnar wrote:
>
> On Tue, 31 Oct 2000, Jeff V. Merkey wrote:
>
> > It relies on an anomoly in the design of Intel's cache controllers,
> > and with memory based applications, I can get 120% scaling per
> > procesoor by jugling the working set of executable code cached accros
> > each processor. There's sample code with this kernel you can use to
> > verify....
>
> FYI, this is a very old concept and a scalability FAQ item. It's called
> "sublinear scaling", and SGI folks have already published articles about
> it 10 years ago.
Ingo,
You don't even know what it is enough to comment intelligently. You can
write the patent office and obtain a copy. The patent is currently in
dispute between Novell and several other companies over S&E ownership,
and there's a court hearing scheduled to resolve it (lukily I don't have
to deal with this one). Nice thing about being an inventor, though, is
I have rights to it, no matter who ends up with the S&E assignment.
(dogs fights over a bone ...).
Jeff
>
> Ingo
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