On Wed, Feb 24, 2016 at 03:16:43PM +0000, Harvey Hunt wrote:
> The id buffer in ata_device is a DMA target, but it isn't explicitly
> cacheline aligned. Due to this, adjacent fields can be overwritten with
> stale data from memory on non coherent architectures. As a result, the
> kernel is sometimes unable to communicate with an ATA device.
>
> Fix this by ensuring that the id buffer is cacheline aligned.
>
> This issue is similar to that fixed by Commit 84bda12af31f
> ("libata: align ap->sector_buf").
>
> Signed-off-by: Harvey Hunt <[email protected]>
> Cc: [email protected]
> Cc: <[email protected]> # 2.6.18
Applied to libata/for-4.5-fixes.
Thanks.
--
tejun
