On Mon, 7 Mar 2016, Franklin S Cooper Jr wrote: > From: Vignesh R <vigne...@ti.com> > > Add hwmod entries for the PWMSS on DRA7. > > Set l4_root_clk_div as the main_clk of PWMSS. It is fixed-factored clock > equal to L4PER2_L3_GICLK/2(l3_iclk_div/2). > > Signed-off-by: Vignesh R <vigne...@ti.com> > [fcoo...@ti.com: Do not add eQEP, ePWM and eCAP hwmod entries] > Signed-off-by: Franklin S Cooper Jr <fcoo...@ti.com>
Thanks, queued for v4.7. - Paul
