On Fri, Mar 18, 2016 at 01:45:22PM -0300, Arnaldo Carvalho de Melo wrote:
> Em Fri, Mar 18, 2016 at 11:38:15AM -0500, Josh Poimboeuf escreveu:
> > On Fri, Mar 18, 2016 at 01:25:47PM -0300, Arnaldo Carvalho de Melo wrote:
> > > Em Thu, Mar 17, 2016 at 06:27:50PM +0100, Lucas Stach escreveu:
> > > > This fixes cross compilation of libapi.
> > > 
> > > Humm, I guess that tools/lib/subcmd/Makefile has the same problem? And
> > > there are also other cases where LD is not being set with CROSS_COMPILE,
> > > Jiri, is there something else at play here?
> > > 
> > > /me needs to cross compile all this code...
> > 
> > Yeah, I already fixed the libsubcmd issue with commit c1d45c3abd49 in
> > tip/core/objtool.  (Sorry, I probably should have CC'ed you and Jiri.)
> 
> Not a problem, it will all get merged eventually, but I noticed this:
> 
> -CC = $(CROSS_COMPILE)gcc
> -AR = $(CROSS_COMPILE)ar
> +CC ?= $(CROSS_COMPILE)gcc
> +LD ?= $(CROSS_COMPILE)ld
> +AR ?= $(CROSS_COMPILE)ar
> 
> This is how you fixed it, which is different from what other places do
> for cross compiling, for instance, this is how tools/lib/bpf/Makefile
> does (and it isn't setting LD as well):
> 
> # Allow setting CC and AR, or setting CROSS_COMPILE as a prefix.
> $(call allow-override,CC,$(CROSS_COMPILE)gcc)
> $(call allow-override,AR,$(CROSS_COMPILE)ar)
> 
> Which is different from what the kernel does in its main Makefile:
> 
> # Make variables (CC, etc...)
> AS              = $(CROSS_COMPILE)as
> LD              = $(CROSS_COMPILE)ld
> CC              = $(CROSS_COMPILE)gcc
> 
> I wonder if we could settle in one of these styles or if there is really
> a reason to be creative :-)
> 
> Better, all this could go to tools/scripts/Makefile.include?

Yeah, I agree that it would be good to come up with a common and
consistent approach tools-wide if possible.

The reason I used '?=' is because objtool needs to be built with the
host compiler, and the tools kbuild doesn't have hostprogs and HOSTCC.
So I and overrode the CC variable.  From tools/objtool/Makefile:

  # always use the host compiler
  CC = gcc
  LD = ld
  AR = ar

So the 'CC ?= $(CROSS_COMPILE)gcc' in tools/lib/subcmd/Makefile allows
the objtool Makefile to override the cross-compilation and use the host
compiler instead.

I _think_ 'allow-override' would also work, because the objtool Makefile
exports the CC/LD/AR variables to the environment before descending into
the subcmd directory.  And 'allow-override' seems to allow overriding
those variables if they were set in the environment.

So 'allow-override' would probably be a good option.

-- 
Josh

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