On 2016-03-21 13:11, Bhuvanchandra DV wrote: > Calculate and update max speed from bus clock for SoC's > using DSPI IP. > > The bus clock factor's are taken from the data sheet's > of respective SoC's.
Plurals are without apostrophe... I wonder if GCC optimizes this to a bit shift... Acked-by: Stefan Agner <[email protected]> > > Signed-off-by: Bhuvanchandra DV <[email protected]> > --- > drivers/spi/spi-fsl-dspi.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c > index 59a1143..8753276 100644 > --- a/drivers/spi/spi-fsl-dspi.c > +++ b/drivers/spi/spi-fsl-dspi.c > @@ -121,18 +121,22 @@ enum dspi_trans_mode { > > struct fsl_dspi_devtype_data { > enum dspi_trans_mode trans_mode; > + u8 max_clock_factor; > }; > > static const struct fsl_dspi_devtype_data vf610_data = { > .trans_mode = DSPI_EOQ_MODE, > + .max_clock_factor = 2, > }; > > static const struct fsl_dspi_devtype_data ls1021a_v1_data = { > .trans_mode = DSPI_TCFQ_MODE, > + .max_clock_factor = 8, > }; > > static const struct fsl_dspi_devtype_data ls2085a_data = { > .trans_mode = DSPI_TCFQ_MODE, > + .max_clock_factor = 8, > }; > > struct fsl_dspi { > @@ -726,6 +730,9 @@ static int dspi_probe(struct platform_device *pdev) > } > clk_prepare_enable(dspi->clk); > > + master->max_speed_hz = > + clk_get_rate(dspi->clk) / dspi->devtype_data->max_clock_factor; > + > init_waitqueue_head(&dspi->waitq); > platform_set_drvdata(pdev, master);
