On Fri, Apr 01, 2016 at 11:41:19AM +0100, Will Deacon wrote: > On Fri, Apr 01, 2016 at 12:31:43PM +0200, Peter Zijlstra wrote: > > On Thu, Mar 31, 2016 at 06:12:38PM -0400, Waiman Long wrote: > > > >>However, if we allow a limited number of readers to spin on the > > > >>lock simultaneously, we can eliminates some of the reader-to-reader > > > >>latencies at the expense of a bit more cacheline contention and > > > >>probably more power consumption. > > > >So the embedded people might not like that much. > > > > > > It could be. It is always a compromise. > > > > So ARM is the only one that currently waits without spinning and could > > care; so Will might have an opinion. One 'solution' would be to make > > this an optional feature. > > Well, perhaps we could built this using the cmp-and-wait structure we spoke > about a couple of months back. What happened with that? Is there something I > need to go implement for ARM/arm64?
Ah, yes, I forgot about that. Lemme go find that discussions and see what I can do there.