On Mon, Apr 11, 2016 at 09:57:55AM +0100, Marc Zyngier wrote:
> Add a decription of the PPI partitioning support.
>
> Signed-off-by: Marc Zyngier <[email protected]>
> ---
> .../bindings/interrupt-controller/arm,gic-v3.txt | 34
> ++++++++++++++++++++--
> 1 file changed, 32 insertions(+), 2 deletions(-)
>
> diff --git
> a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt
> b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt
> index 007a5b4..4c29cda 100644
> --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt
> +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt
> @@ -11,6 +11,8 @@ Main node required properties:
> - interrupt-controller : Identifies the node as an interrupt controller
> - #interrupt-cells : Specifies the number of cells needed to encode an
> interrupt source. Must be a single cell with a value of at least 3.
> + If the system requires describing PPI affinity, then the value must
> + be at least 4.
You're winning for cell count...
One alternative that would save adding a cell and keep it contained
within would be just list the affinities in the GIC node in the form of
'<PPI#> <count> <cpu phandles>':
ppi-affinity = <1 2 &cpu2 &cpu3>,
<5 1 &cpu4>,
...
This would be harder to parse though if you have a large number of PPIs
with affinities.
That said, I've got no real issue with this as is.
Rob
