Hi Marc, Please see the link: https://patchwork.kernel.org/patch/8649241/
Rob Herring has given the ACK. I have submitted the v6 patch: https://patchwork.kernel.org/patch/8649251/ Please apply the latest the patch after you review. Thank you very much. Regard, Minghuan > -----Original Message----- > From: Marc Zyngier [mailto:[email protected]] > Sent: Friday, April 22, 2016 3:43 PM > To: Leo Li <[email protected]> > Cc: Minghuan Lian <[email protected]>; > [email protected]; lkml <[email protected]>; > Thomas Gleixner <[email protected]>; Jason Cooper > <[email protected]>; Roy Zang <[email protected]>; Mingkai Hu > <[email protected]>; Stuart Yoder <[email protected]>; Yang-Leo Li > <[email protected]>; Rob Herring <[email protected]>; Mark Rutland > <[email protected]> > Subject: Re: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller > support > > On 22/04/16 06:33, Leo Li wrote: > > On Mon, Mar 7, 2016 at 3:50 AM, Marc Zyngier <[email protected]> > wrote: > >> On Mon, 7 Mar 2016 11:36:22 +0800 > >> Minghuan Lian <[email protected]> wrote: > >> > >>> Some kind of NXP Layerscape SoC provides a MSI > >>> implementation which uses two SCFG registers MSIIR and > >>> MSIR to support 32 MSI interrupts for each PCIe controller. > >>> The patch is to support it. > >>> > >>> Signed-off-by: Minghuan Lian <[email protected]> > >> > >> Acked-by: Marc Zyngier <[email protected]> > >> > >> The DT binding still needs an Ack from the DT maintainers though (cc'd). > > > > Marc, > > > > Who will be responsible to pick this driver? I see you are also one > > of the maintainers for irqchip. Can you pick up the driver? The > > binding has already gotten ACKed by the device tree maintainer. > > Can you point me to this Ack? I can't see any trace of it in my Inbox. > > Thanks, > > M. > -- > Jazz is not dead. It just smells funny...
