This patch introduces default drv phase exposed to dts for
users to set drv phase. If default-drv-phase is not assigned,
let's set it to 180 degrees.

Signed-off-by: Shawn Lin <shawn....@rock-chips.com>
---

 drivers/mmc/host/dw_mmc-rockchip.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/mmc/host/dw_mmc-rockchip.c 
b/drivers/mmc/host/dw_mmc-rockchip.c
index 8c20b81..482eff1 100644
--- a/drivers/mmc/host/dw_mmc-rockchip.c
+++ b/drivers/mmc/host/dw_mmc-rockchip.c
@@ -24,6 +24,7 @@ struct dw_mci_rockchip_priv_data {
        struct clk              *drv_clk;
        struct clk              *sample_clk;
        int                     default_sample_phase;
+       int                     default_drv_phase;
 };
 
 static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios)
@@ -66,6 +67,9 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct 
mmc_ios *ios)
        /* Make sure we use phases which we can enumerate with */
        if (!IS_ERR(priv->sample_clk))
                clk_set_phase(priv->sample_clk, priv->default_sample_phase);
+
+       if (!IS_ERR(priv->drv_clk))
+               clk_set_phase(priv->drv_clk, priv->default_drv_phase);
 }
 
 #define NUM_PHASES                     360
@@ -203,6 +207,10 @@ static int dw_mci_rk3288_parse_dt(struct dw_mci *host)
                                        &priv->default_sample_phase))
                priv->default_sample_phase = 0;
 
+       if (of_property_read_u32(np, "rockchip,default-drv-phase",
+                                       &priv->default_drv_phase))
+               priv->default_drv_phase = 180;
+
        priv->drv_clk = devm_clk_get(host->dev, "ciu-drive");
        if (IS_ERR(priv->drv_clk))
                dev_dbg(host->dev, "ciu_drv not available\n");
-- 
2.3.7


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