> -----Original Message-----
> From: Thomas Gleixner [mailto:t...@linutronix.de]
> Sent: Friday, May 06, 2016 5:53 PM
> To: Chen, Yu C
> Cc: x...@kernel.org; linux-kernel@vger.kernel.org; Ingo Molnar; H. Peter
> Anvin;
> Gao, Bin; Len Brown; Rafael J. Wysocki; 3 . 14+ # 3 . 14+
> Subject: Re: [PATCH] x86, tsc: Fix tsc ratio calibration to avoid broken
> mdelay
>
>
> On Fri, 6 May 2016, Thomas Gleixner wrote:
> > On Fri, 6 May 2016, yu.c.c...@intel.com wrote:
> > > From: Chen Yu <yu.c.c...@intel.com>
> > >
> > > Currently we fetch the tsc radio by:
> > > ratio = (lo >> 8) & 0x1f;
> > > thus get bit8~bit12 of the MSR_PLATFORM_INFO, however according to
> > > Intel 64 and IA-32 Architectures Software Developer Manual 35.5, the
> > > ratio bit should be bit8~bit15, otherwise we might get incorrect tsc
> > > ratio and cause system hang later(mdelay corrupted).
> >
> > The resulting issue is that both TSC frequency, which is used for
> > udelay, and the lapic timer frequency are wrong. mdelay is just the
> > visible damage caused by that.
>
> Aside of that:
>
> > Cc: 3.14+ <sta...@vger.kernel.org> # 3.14+
>
> Please use:
>
> Fixes: commit '....'
>
> next time, which identifies the kernel version to which this needs to be
> backported and gives a reference to the commit which caused the issue.
>
OK, thanks!
