On 10/05/16 12:54, Felipe Balbi wrote: > > Hi, > > Roger Quadros <[email protected]> writes: >> TRM [1] recommends that POWERPRESENT bit must not be >> set and left at it's default value of 0. >> >> [1] OMAP542x TRM - http://www.ti.com/lit/pdf/swpu249 >> Section 23.11.4.5.1 Mailbox VBUS/ID Management >> >> "Because PIPE powerpresent has a different meaning in host and in device >> mode, >> and because of the redundancy with the UTMI signals, the controller ORes >> together the appropriate PIPE and UTMI inputs to create its internal >> VBUS status. For that reason, it is recommended to leave field >> USBOTGSS_UTMI_OTG_STATUS[9] POWERPRESENT at its default value (=0), and only >> to >> fill in the USB2 VBUS status fields in the same register." >> >> Signed-off-by: Roger Quadros <[email protected]> > > to make sure we avoid regressions, do you mind sharing on which > platforms you tested this patch ? > I tested this on omap5-uevm and dra7-evm. My am437x board stopped working so couldn't test on that one.
cheers, -roger
