When starting secondary VPEs which support EVA and the SegCtl registers, copy the memory segmentation configuration from the running VPE to ensure that all VPEs in the core have a consitent virtual memory map.
The EVA configuration of secondary cores is dealt with when starting the core via the CM. Signed-off-by: Matt Redfearn <[email protected]> --- arch/mips/kernel/cps-vec.S | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S index ac81edd44563..07b3274c8ae1 100644 --- a/arch/mips/kernel/cps-vec.S +++ b/arch/mips/kernel/cps-vec.S @@ -431,6 +431,22 @@ LEAF(mips_cps_boot_vpes) mfc0 t0, CP0_CONFIG mttc0 t0, CP0_CONFIG + /* Copy the EVA config from this VPE if the CPU supports it */ + mfc0 t0, CP0_CONFIG, 1 + bgez t0, 1f + mfc0 t0, CP0_CONFIG, 2 + bgez t0, 1f + mfc0 t0, CP0_CONFIG, 3 + and t0, t0, MIPS_CONF3_SC + beqz t0, 1f + nop + mfc0 t0, CP0_SEGCTL0 + mttc0 t0, CP0_SEGCTL0 + mfc0 t0, CP0_SEGCTL1 + mttc0 t0, CP0_SEGCTL1 + mfc0 t0, CP0_SEGCTL2 + mttc0 t0, CP0_SEGCTL2 +1: /* Ensure no software interrupts are pending */ mttc0 zero, CP0_CAUSE mttc0 zero, CP0_STATUS -- 2.5.0
