In pcie_config_aspm_link(), when convert ASPM state to
upstream/downstream ASPM register state, the upstream variable and
dwsream variable are reversed. This causes PCI/E link enter ASPM L0s
even it should be disabled and PCI/E endpoint may reset randomly.

Signed-off-by: Ocean He <he...@lenovo.com>
---
 drivers/pci/pcie/aspm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 2dfe7fd..3f8a44d 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -439,9 +439,9 @@ static void pcie_config_aspm_link(struct pcie_link_state 
*link, u32 state)
                return;
        /* Convert ASPM state to upstream/downstream ASPM register state */
        if (state & ASPM_STATE_L0S_UP)
-               dwstream |= PCI_EXP_LNKCTL_ASPM_L0S;
-       if (state & ASPM_STATE_L0S_DW)
                upstream |= PCI_EXP_LNKCTL_ASPM_L0S;
+       if (state & ASPM_STATE_L0S_DW)
+               dwstream |= PCI_EXP_LNKCTL_ASPM_L0S;
        if (state & ASPM_STATE_L1) {
                upstream |= PCI_EXP_LNKCTL_ASPM_L1;
                dwstream |= PCI_EXP_LNKCTL_ASPM_L1;
-- 
1.8.3.1

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