Hi Greg,
> > > > The issue is not the firmware. The issue is that the Linux uio
> > > > driver
> > > > (here: uio_cif) does not work as uio_mmap() -> uio_mmap_physical()
> > > > does not do a mmap on physical memory that is not page aligned...
> > >
> > > Then why not fix the uio_cif driver?
> > The fix might be in uio and not in uio_cif. However
> > uio_mmap_physical() in uio.c has introduced checks to reject non page-
> aligned addresses.
>
> Yes, because we had real problems with that in the past.
>
> > These checks have been introduced somewhere in between kernel V3.2 and
> kernel V3.18.
> > Removing these checks again does not sound to me like a good idea...
>
> I agree, you should fix your hardware :)
>
> > The overall question is now if the UIO system is working at all with
> > non page aligned PCI memory resources. For me it looks as if this is not the
> case.
>
> How is your system ending up with such alignment in the first place?
> What is the resource list after booting?
Here is the resource list of the relevant PCI board. The first memory resource
has a size of 128k and is not page aligned.
0f:05.0 Bridge: PLX Technology, Inc. PCI9030 32-bit 33MHz PCI <-> IOBus Bridge
(rev 01)
Subsystem: PLX Technology, Inc. Hilscher CIF50-PB/DPS Profibus
Flags: medium devsel, IRQ 23
Memory at eae4f400 (32-bit, non-prefetchable) [size=128]
I/O ports at 9800 [size=128]
Memory at eae4c000 (32-bit, non-prefetchable) [size=8K]
Capabilities: [40] Power Management version 1
Capabilities: [48] CompactPCI hot-swap <?>
Capabilities: [4c] Vital Product Data
Kernel driver in use: hilscher
Regards
Mathias
