From: Derek Basehore <dbaseh...@chromium.org> This patch set adds support for catching errors when entering freeze on Intel Skylake SoCs. Support for this can be added to newer SoCs in later patches.
Verification is done by waking up the CPU up to 1000 seconds later based on base 10 exponential backoff from 1 second to check the residency of S0ix. This can't be verified before attempting to enter S0ix through mwait, so we have to repeatedly verify entry into that state. Successfully entering S0ix is no guarantee that it will be entered on the next attempt, so we have to schedule another check. This has a minimal average power impact of ~3uW on Skylake systems. This leaves plenty of room for additional overhead based on changes to the system. This relies on the recently added patch "platform/x86: Add PMC Driver for Intel Core SoC" Changes for v2: - Moved to exponential backoff for the freeze duration with a max of 1000 seconds - Changed to make the feature default off - Add module parameter for enabling/disabling the feature instead of a debugfs entry Derek Basehore (5): x86: stub out pmc function clockevents: Add timed freeze x86, apic: Add timed freeze support freeze: Add error reporting intel_idle: Add S0ix validation arch/x86/include/asm/pmc_core.h | 6 +- arch/x86/kernel/apic/apic.c | 25 ++++++- drivers/acpi/processor_idle.c | 10 ++- drivers/cpuidle/cpuidle.c | 31 ++++++-- drivers/idle/intel_idle.c | 161 +++++++++++++++++++++++++++++++++++++--- include/linux/clockchips.h | 10 +++ include/linux/cpuidle.h | 10 ++- include/linux/suspend.h | 10 +++ kernel/power/suspend.c | 11 ++- kernel/time/clockevents.c | 117 +++++++++++++++++++++++++++++ 10 files changed, 361 insertions(+), 30 deletions(-) -- 2.8.0.rc3.226.g39d4020