On Thursday 01 February 2007 10:59, [EMAIL PROTECTED] wrote:
> struct vxtime_data {
> + union {
> + struct {
> + u64 tsc_slope; /* TSC to MT coefficient */
> + u64 tsc_slope_avg; /* average tsc_slope */
> + u64 mt_base; /* approximated MT at the last
> LAPIC tick */
> + u64 mt_last; /* MT at the last LAPIC tick */
> + u64 tsc_last; /* TSC at the last LAPIC tick */
> + u64 last_mt_guess; /* ensures monotonicity in
> temporary MT mode */
> + char tsc_invalid; /* don't trust the TSC now
> (frequency changing) */
> + };
> + char pad[64]; /* cacheline alignment */
Use some variant of __cacheline_aligned_in_smp
There are far better ways than to hardcode
> + } cpu[NR_CPUS];
This can become very large with default NR_CPUS==128. I would prefer
a way that waste less space on smaller machines by only sizing the array
num_possible_cpus()
> long hpet_address; /* HPET base address */
> - int last;
> - unsigned long last_tsc;
> - long quot;
> - long tsc_quot;
> + u64 mt_q; /* master timer to nsec quotient */
> + u64 mt_wall; /* MT ticks already covered by the jiffies */
> + s64 ns_drift; /* MT - xtime drift in the last tick in ns */
Might make sense to duplicate those to all per cpu datas, then they
only need to acce
-Andi
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