From: Rob Rice <[email protected]> Add the device tree binding documentation for the PDC hardware in Broadcom iProc SoCs.
Signed-off-by: Rob Rice <[email protected]> Acked-by: Rob Herring <[email protected]> Reviewed-by: Ray Jui <[email protected]> Reviewed-by: Anup Patel <[email protected]> Reviewed-by: Scott Branden <[email protected]> --- .../bindings/mailbox/brcm,iproc-pdc-mbox.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt new file mode 100644 index 0000000..411ccf4 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt @@ -0,0 +1,23 @@ +The PDC driver manages data transfer to and from various offload engines +on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is +one device tree entry per block. + +Required properties: +- compatible : Should be "brcm,iproc-pdc-mbox". +- reg: Should contain PDC registers location and length. +- interrupts: Should contain the IRQ line for the PDC. +- #mbox-cells: 1 +- brcm,rx-status-len: Length of metadata preceding received frames, in bytes. + +Optional properties: +- brcm,use-bcm-hdr: present if a BCM header precedes each frame. + +Example: + pdc0: iproc-pdc0@0x612c0000 { + compatible = "brcm,iproc-pdc-mbox"; + reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */ + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; /* one cell per mailbox channel */ + brcm,rx-status-len = <32>; + brcm,use-bcm-hdr; + }; -- 2.1.0
