On Thu, Jul 21, 2016 at 02:27:02PM +0800, Andy Green wrote: > On July 21, 2016 1:22:02 PM GMT+08:00, John Stultz <john.stu...@linaro.org> > wrote: > >On Wed, Jul 20, 2016 at 9:26 PM, zhangfei <zhangfei....@linaro.org>
Please fix your mail client to word wrap within paragraphs at something
substantially less than 80 columns. Doing this makes your messages much
easier to read and reply to.
> >> How about using wmb() flush before start dma to sync desc?
> >So I'm not going to pretend to be an expert here, but my understanding
> >is that wmb() syncrhonizes cpu write ordering operations across cpus,
> IIUI what the memory barrier does is tell the *compiler* to actually
> do any writes that the code asked for, but which otherwise might
> actually be deferred past that point. The compiler doesn't know that
> buffer area has other hardware snooping it, so by default it feels it
> can play tricks with what seems to it like just generally deferring
> spilling registers to memory. wmb makes sure the compiler's pending
> writes actually happen right there. (writel() etc definitions have
> one built-in, so they always do what you asked when you asked).
You might be interested in Mark Rutland's talk from ELC (Stale data, or
how we (mis-)manage modern caches):
http://events.linuxfoundation.org/sites/events/files/slides/slides_17.pdf
https://www.youtube.com/watch?v=F0SlIMHRnLk
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