[PATCH v9 3/4] arm64: dts: rockchip: add usb2-phy support for rk3399

[Frank Wang]

Add usb2-phy nodes and specify phys phandle for ehci.

Signed-off-by: Frank Wang <frank.w...@rock-chips.com>
---

Changes in v9:
 - Move the usb gpio config to rk3399-evb.dts
 - Fix ehci phy-names property.

 arch/arm64/boot/dts/rockchip/rk3399.dtsi |   42 +++++++++++++++++++++++++++++-
 1 file changed, 41 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi 
b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d7f8e06..843d51c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -221,6 +221,8 @@
                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru HCLK_HOST0>, <&cru HCLK_HOST0_ARB>;
                clock-names = "hclk_host0", "hclk_host0_arb";
+               phys = <&u2phy0_host>;
+               phy-names = "usb";
                status = "disabled";
        };
 
@@ -239,6 +241,8 @@
                interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru HCLK_HOST1>, <&cru HCLK_HOST1_ARB>;
                clock-names = "hclk_host1", "hclk_host1_arb";
+               phys = <&u2phy1_host>;
+               phy-names = "usb";
                status = "disabled";
        };
 
@@ -481,8 +485,44 @@
        };
 
        grf: syscon@ff770000 {
-               compatible = "rockchip,rk3399-grf", "syscon";
+               compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
                reg = <0x0 0xff770000 0x0 0x10000>;
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               u2phy0: usb2-phy@e450 {
+                       compatible = "rockchip,rk3399-usb2phy";
+                       reg = <0xe450 0x10>;
+                       clocks = <&cru SCLK_USB2PHY0_REF>;
+                       clock-names = "phyclk";
+                       #clock-cells = <0>;
+                       clock-output-names = "clk_usbphy0_480m";
+                       status = "disabled";
+
+                       u2phy0_host: host-port {
+                               #phy-cells = <0>;
+                               interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "linestate";
+                               status = "disabled";
+                       };
+               };
+
+               u2phy1: usb2-phy@e460 {
+                       compatible = "rockchip,rk3399-usb2phy";
+                       reg = <0xe460 0x10>;
+                       clocks = <&cru SCLK_USB2PHY1_REF>;
+                       clock-names = "phyclk";
+                       #clock-cells = <0>;
+                       clock-output-names = "clk_usbphy1_480m";
+                       status = "disabled";
+
+                       u2phy1_host: host-port {
+                               #phy-cells = <0>;
+                               interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupt-names = "linestate";
+                               status = "disabled";
+                       };
+               };
        };
 
        watchdog@ff840000 {
-- 
1.7.9.5