On Wed, May 25, 2016 at 08:18:06AM -0500, Rob Herring wrote: > On Wed, May 25, 2016 at 12:43 AM, Rich Felker <dal...@libc.org> wrote: > > The J-Core project (j-core.org) produces open source cpu and SoC > > peripheral cores synthesizable as FPGA bitstreams or ASICs. > > > > Signed-off-by: Rich Felker <dal...@libc.org> > > Please add acks when posting subsequent versions. > > > --- > > Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt > > b/Documentation/devicetree/bindings/vendor-prefixes.txt > > index 86740d4..9c070b8 100644 > > --- a/Documentation/devicetree/bindings/vendor-prefixes.txt > > +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt > > @@ -126,6 +126,7 @@ invensense InvenSense Inc. > > isee ISEE 2007 S.L. > > isil Intersil > > issi Integrated Silicon Solutions Inc. > > +jcore J-Core.org > > jedec JEDEC Solid State Technology Association > > karo Ka-Ro electronics GmbH > > keymile Keymile GmbH > > -- > > 2.8.1
Since this was previously acked, can I include it in my tree for upstreaming? Or do you want me to submit the patch again? Rich
