Add the Keystone IRQ controller IP node on K2G SoC. This allows the ARM CorePac core to receive interrupts from remote processor devices (eg: DSP) on the SoC.
The IP is identical in functionality to that of the equivalent nodes on existing K2 SoCs. The only difference is the ARM INTC interrupt id/event number. Signed-off-by: Andrew F. Davis <[email protected]> Signed-off-by: Suman Anna <[email protected]> --- arch/arm/boot/dts/keystone-k2g.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/keystone-k2g.dtsi b/arch/arm/boot/dts/keystone-k2g.dtsi index fe17dc4..eccda9c 100644 --- a/arch/arm/boot/dts/keystone-k2g.dtsi +++ b/arch/arm/boot/dts/keystone-k2g.dtsi @@ -98,5 +98,13 @@ clock-frequency = <200000000>; status = "disabled"; }; + + kirq0: keystone_irq@026202a0 { + compatible = "ti,keystone-irq"; + interrupts = <GIC_SPI 1 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <1>; + ti,syscon-dev = <&devctrl 0x2a0>; + }; }; }; -- 2.9.2
